CLDC

CLDC (CS-P-1767 - revision 3)

Features

• Double Euro size module
• 16 low noise analog clocks
• 16 low noise bias voltages
• Telemetry of clock and bias voltages
• Temperature stable precise reference voltage
• Monitoring of analog clocks

General Description

The Module provides 16 clock and 16 bias voltage generators with a maximum continuous output current drive of 36mA and an amplitude range of +/-10V. Clock high / low levels and the bias voltages are generated by 12-bit DAC's and following operational amplifiers. The clocks are produced by fast CMOS multiplexers ( HI-201HS ) switching between the outputs of the high or the corresponding low level operational amplifiers of a clock driver. Their input switch signal is a TTL signal from the backplane P2 connector. Clocks and Bias voltages are output on the backplane P2 connector. On board telemetry is done with a 12 bit ADC (3.3 usec conversion time) connected to the input of the analog switches, via analog multiplexers. At power-up, the clock and bias outputs are disabled (10KOhm to GND). The outputs can be enabled through software

CLDC (CS-P-1767- revision E)

Features

• Double Euro size module
• 16 low noise analog clocks
• 16 low noise bias voltages
• Telemetry of clock and bias voltages
• Temperature stable precise reference voltage
• Separately Digital analog connectors
• Temperature measurement of detector
• Monitoring of analog clocks
• Disable the output clocks through software and hardware
• compatible to previous version

General Description

This module works in cooperation with the SEQUENCER module, which generate the digital pattern for the detector readout. The incoming patterns from the SEQUENCER are TTL signals, that means only logical bit '1' or '0'. They are input control signal for the analog switch component, their every two output signals are connected together.

The Module provides 16 clock and 16 bias voltage generators with a maximum continuous output current drive of 80mA and an amplitude range of +/-10V. 12-bit DAC's and following operational amplifiers generate clocks bias voltages. Clocks and Bias voltages are output on the front connector. DSUB25 is for Clocks and DSUB37 is for Bias voltages foreseen. On board telemetry is done with a 12 bit ADC (3.3 m sec conversion time) connected to the input of the analog switches, via analog multiplexers. At power-up, the clock and bias outputs are disabled (10KOhm to GND). The outputs can be enabled through software and an external input signal. If the pin 36 of DSUB37 connectors goes low, the outputs of CLDC will be disabled. A voltage references circuit provides stable voltages for the DAC's. CLDC's system processor is a T225 transputer.

CS-P-1767- revision 3

CS-P-1767- revision E

CS-P-1767- revision E

CS-P-1767- revision 3